Two of the biggest challenges in developing next generation packaging technologies are package warpage reduction and package thickness reduction. These challenges are due to the ever increasing demand in the consumer microelectronic market for smaller and thinner devices.
Currently in chip scale packages (CSP) with molded underfill (MUF), an over-mold is used to try to control package warpage. In addition, Through-Mold-Interconnect (TMI) is usually used to connect an electronic package in a package-on-package configuration with other electronic devices/packages (e.g., DRAM).
There are several drawbacks that are associated with conventional over-mold plus TMI electronic packaging solutions. These drawbacks are due to manufacturing considerations that are associated with (i) relatively high temperatures during fabrication of the electronic packages; and (ii) smaller form factors for the electronic packages.
One of the drawbacks relates to high warpage due to relatively high temperatures that occur during fabrication of electronic packages. Utilizing over-mold as a warpage solution requires ultrathin dies and relatively thick over-mold to achieve reduced warpage.
An electronic package is typically very sensitive to warpage during molding processes because of the existence of large amount of mold material in the electronic package. When there is a relatively large amount of over-mold and relatively little silicon, the electronic package commonly becomes “floppy” resulting in relatively large variations in electronic package shape and warpage magnitude.
Another of the drawbacks relates finding a proper mold material for different types of electronic packages. Electronic packages may differ in size and/or form factor. One important consideration when over-molding is balancing the bottom half of the electronic package with the over-mold.
As an example, a die area may have a very different stiffness and thermal expansion coefficient than a non-die area. Therefore, when the electronic package geometry changes, the over-mold material and over-mold thickness may need to be reconfigured.
There is no universal over-mold solution for different types of electronic packages. Changing over-mold materials for each type of electronic package does not promote efficient manufacturing of electronic packages.
Another of the drawbacks relates to surface mounting (SMT) DRAM utilizing top side ball attach (TSBA), which often causes concern related to solder joint quality (SJQ) and solder joint reliability (SJR). A relatively thick over-mold may alleviate electronic package warpage but may also make mounting DRAM using SMT more difficult. Attaching DRAM using SMT may be more difficult because the through mold interconnect (TMI) hole may be too deep for a DRAM solder ball to connect with a solder ball on a top side of the substrate.
One solution is to raise the top side solder ball height. As an example, a reconfigured TSBA may raise the top side solder ball height from 210 um to 260 um. After the DRAM ball and TSBA ball merge together, the final joint height may be undesirably high (i.e., over 400 um). This reconfiguration causes a relatively thin and tall TMI joint that may have diminished SJQ and SJR, especially during temperature cycling which may occur during fabrication and use of the electronic package.